Sampling Quality

This special issue had its genesis in the 22nd Design Automation Conference, held June 23-26, 1985, in Las Vegas. Of the 125 high-quality papers presented at that meeting, seven were eventually selected, updated, and augmented as representative of the areas covered. There are four articles from universities and three from industry covering the areas of layout, silicon compilation with testability, design rule checking and layout analysis, computer-aided manufacturing, and automated schematic entry. Many of the articles in this issue emphasize not only design automation, but obtaining solutions to problems that require the human designer to provide the intelligence for producing results superior to those obtained by automation alone. The attempt to incorporate testability features in a silicon compiler is a healthy one. Silicon compilation with the usual metrics of automated synthesis, and without testability considerations, can produce results that are difficult to test. With this introduction, let us look at the seven articles: "WEAVER: A Knowledge-Based Routing Expert," by Rostam Joobbani and Daniel Siewiorek of Carnegie-Mellon University, describes a channel/switchbox routing program that uses some of the concepts in artificial intelligence. The authors demonstrate through various examples that their knowledge-based approach is a practical means of solving the knowledge-intensive problem of VLSI chip routing. They claim that such an approach improves the quality of the final layout by considering a large number of often conflicting metrics. WEAVER does away with the restriction of using strictly vertical lines on different layers. Examples provide a comparison with other routing techniques.